2023-12-29 13:46:00
The Taiwan Semiconductor Manufacturing Company (TSMC) shared at the International Electron Devices Meeting (IEDM), an event that deals with innovations in the hardware segment, an infographic that shows the manufacturer’s expectations for semiconductors, with wafers with up to a trillion transistors expected by 2030.
According to the company, this will be possible with the 1-nanometer A10 process that will allow a density of 200 billion transistors, which should arrive in 2030. Among them are the 2nm N2 and N2P processes and the 1.4nm A14, the latter scheduled to be presented in 2027, promising greater energy efficiency and, consequently, performance.
The 1 nm technology is still in the exploratory phase and has no scheduled date for reaching the market. TSMC clarified that its discovery may not be used in large-scale manufacturing anytime soon, and that it is experimenting with other options. However, the advance demonstrates the potential of human innovation and opens up new possibilities for the computing industry.
TSMC is already producing chips with 2nm technology, which are expected to enter mass production in the second half of 2025, at its factory in Hsinchu, Taiwan. 2nm chips promise to be 10% to 15% faster and consume 25% to 30% less power than 3nm chips.
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