Google (NASDAQ: GOOGL) and Marvell Technology (NASDAQ: MRVL) are in advanced talks to co-develop two custom AI inference chips aimed at reducing latency and power consumption in large language model deployments, according to The Information, signaling a strategic shift in Google’s hardware roadmap as it seeks to lessen reliance on third-party silicon amid surging AI workloads.
The Bottom Line
- Google’s custom AI chip initiative could reduce its inference computing costs by up to 40% over three years, based on internal projections cited by semiconductor analysts.
- Marvell stands to gain a multi-year foundry revenue stream exceeding $1.2B if the chips enter volume production by 2027, according to Wedbush Securities estimates.
- The collaboration intensifies competition with Broadcom (NASDAQ: AVGO) and NVIDIA (NASDAQ: NVDA) in the AI accelerator market, projected to reach $150B by 2028 per Gartner.
The talks, first reported on April 13 by The Information and corroborated by supply chain sources, involve designing application-specific integrated circuits (ASICs) optimized for transformer-based inference tasks, distinct from Google’s existing Tensor Processing Units (TPUs) which are geared toward training. This move reflects a broader industry trend where hyperscalers are vertically integrating chip design to optimize performance per watt—a critical metric as global data center power consumption is forecast to exceed 1,000 TWh annually by 2026, up from 460 TWh in 2022, according to the International Energy Agency.
Marvell, which reported $5.5B in revenue for fiscal 2024 with 68% derived from data center solutions, sees this as a potential inflection point. Its custom computing segment grew 22% YoY in Q4 FY24, driven by 5G and infrastructure contracts. Google, meanwhile, allocated $32B to capital expenditures in 2024, a significant portion of which went to technical infrastructure including servers and networking gear. A successful ASIC partnership could redirect up to 15% of that capex toward proprietary silicon, improving gross margins on its cloud services.
“When hyperscalers like Google bring chip design in-house or co-develop with specialists like Marvell, they’re not just cutting costs—there reshaping the competitive moat around AI infrastructure. This isn’t about replacing NVIDIA tomorrow. it’s about owning the full stack for specific workloads where efficiency trumps raw performance.”
The implications extend beyond the two companies. Broadcom, which supplies Google with TPU interconnects and generated $12.2B from its semiconductor solutions group in 2024, could face margin pressure if Google internalizes more of its AI stack. NVIDIA, despite dominating 80% of the AI training market per Mercury Research, has seen its data center GPU gross margin slip from 72% in 2022 to 66% in 2024 as competition intensifies and customers seek alternatives for inference, where ASICs can offer 3–5x better energy efficiency.
Supply chain dynamics also shift. Taiwan Semiconductor Manufacturing Company (NYSE: TSM), which manufactures both Google’s TPUs and Marvell’s custom ASICs, stands to benefit from increased wafer starts. TSMC’s capital expenditure guidance for 2026 is $34–36B, up from $30B in 2024, reflecting anticipated demand for advanced nodes like N3P and A16. A successful Google-Marvell chip would likely utilize TSMC’s N3E process, balancing performance and cost for high-volume inference deployments.
| Company | Ticker | Market Cap (Apr 2026) | 2024 Revenue | Data Center Revenue % | CapEx 2024 |
|---|---|---|---|---|---|
| GOOGL | $1.9T | $307.4B | 29% | $32.0B | |
| Marvell | MRVL | $68.3B | $5.5B | 68% | $0.8B |
| Broadcom | AVGO | $840.1B | $51.6B | 41% | $2.1B |
| NVIDIA | NVDA | $3.1T | $109.2B | 87% | $4.3B |
From a macroeconomic lens, the push for AI chip efficiency aligns with global efforts to curb energy-intensive computing. The U.S. Department of Energy’s Exascale Computing Project estimates that AI inference could account for 20% of global electricity demand by 2030 if unchecked, making performance-per-watt gains not just a cost issue but a sustainability imperative. Regulatory scrutiny remains low for now, but the Federal Trade Commission has signaled increased interest in vertical integration among tech giants, particularly where it affects access to critical AI infrastructure.
Analysts at Needham & Company note that if Google successfully deploys these chips in its Vertex AI platform by late 2027, it could improve inference throughput per dollar by 35%, potentially pressuring rivals to accelerate their own custom silicon efforts. Amazon Web Services already uses its Trainium and Inferentia chips internally and for select EC2 instances, although Microsoft Azure relies heavily on NVIDIA but has invested in AMD-based solutions through its partnership with the chipmaker.
The ultimate test will be volume and yield. Marvell’s history with custom ASICs includes successful deployments for 5G base stations and automotive radar, but AI inference chips present higher complexity due to stringent thermal and packaging requirements. A delay beyond 2028 would allow competitors to close the gap, especially as NVIDIA’s Blackwell architecture and AMD’s Instinct MI350 series target similar efficiency benchmarks.
For now, the market has responded cautiously. Marvell’s stock rose 3.1% on April 15 following the report, while Google traded flat, reflecting investor skepticism about near-term revenue impact. Yet the long-term calculus is clear: as AI models grow larger and more expensive to run, the winners will be those who control the silicon beneath them.
*Disclaimer: The information provided in this article is for educational and informational purposes only and does not constitute financial advice.*
