The NVIDIA Vera Rubin NVL72 system has debuted in MLPerf Inference v6.1 testing, delivering up to 3.7x higher throughput than the GB300 NVL72 on Qwen3-VL workloads. Evaluated on September 16, 2026, the 72-GPU preview architecture highlights significant generational gains in accelerated computing, driven by full-stack hardware and software codesign.
Decoding the Vera Rubin MLPerf Inference v6.1 Debut
AI inference economics rely on three core levers: system performance, efficient infrastructure scaling, and continuous software optimization. In its inaugural preview submissions to the MLPerf Inference v6.1 suite, the platform smashed previous generational benchmarks across demanding language and vision models.
NVIDIA submitted preview results for the Vera Rubin NVL72 on DeepSeek-R1 and Qwen3-VL, two of the most compute-intensive workloads in the benchmark suite. When running Qwen3-VL across offline, server, and interactive scenarios, the Vera Rubin system achieved up to 3.7x higher throughput compared to the preceding GB300 NVL72. These gains utilized vLLM paired with the open-source NVIDIA Dynamo inference framework. For DeepSeek-R1, leveraging the NVIDIA TensorRT-LLM library yielded throughput up to 2.5x higher than the GB300 baseline.
Under the Hood: Hardware and Software Codesign
Raw hardware specifications tell only half the story. The generational leap observed in the MLPerf v6.1 results stems from deep codesign across both silicon and software stacks. Vera Rubin’s enhanced Tensor Cores and Transformer Engine accelerate the dual phases of token generation: prefill and decode. Furthermore, NVFP4 precision shrinks the memory footprint across model weights, attention mechanisms, and the Key-Value (KV) cache.
This reduction in memory overhead drives higher throughput without sacrificing output quality. Submissions for Vera Rubin also heavily leaned on disaggregated serving architectures. By separating prefill and decode tasks, alongside large-scale expert parallelism, the system maximizes execution efficiency across the mixture-of-experts layers found in frontier models like DeepSeek-R1 and Qwen3-VL.
At the rack scale, the NVL72 domain relies on sixth-generation NVIDIA NVLink and NVLink Switch architecture. This interconnect fabric delivers 10x higher packet rates and 3x lower latency than off-the-shelf Ethernet switches, providing the deterministic bandwidth required to keep hundreds of accelerators synchronized.
Hardware Architecture Highlights:
- System Scale: 72 VR200 accelerators across 18 nodes (four GPUs and two Vera CPUs per node).
- Memory: 288GB of HBM4 per accelerator.
- Interconnect: Sixth-generation NVLink and NVLink Switch fabric.
- Cooling: Liquid-cooled CPUs, GPUs, ConnectX-7 networking, and NVLink switches.
Rack-Scale Scaling Efficiency and Ecosystem Benchmarks
Hardware scale means little if adding GPUs introduces massive coordination overhead. According to MLPerf Inference v6.1 submissions, the NVIDIA GB300 NVL72 demonstrated a 99% scaling efficiency in the offline scenario when scaling from a single 72-GPU rack to four interconnected racks totaling 288 GPUs. Throughput scaled almost linearly with the added hardware.
Additional validation came from the broader tech ecosystem. Nebius submitted preview results for the Vera Rubin NVL72, demonstrating competitive performance on a 36-GPU configuration. In parallel, Nebius ran bare-metal and virtual machine configurations on the GB300 NVL72, securing top placement in server and offline scenarios for DeepSeek-R1 at full-rack scale, reaching 603,023 and 689,961 tokens per second respectively, according to published MLCommons records.
Beyond traditional throughput tests, emerging agentic benchmarks reflect how multi-step reasoning alters performance metrics. In preview testing on the SemiAnalysis AgentX benchmark, the Vera Rubin NVL72 delivered 30x better performance than the GB300 NVL72, signaling a massive shift for autonomous AI agents that plan, reason, and act across multiple loops.
The 30-Second Verdict for Enterprise Infrastructure
For data center operators, higher throughput translates directly to lower cost per token and increased revenue potential per rack. However, procurement teams must look beyond peak headline figures.
Continuous software engineering continues to push performance boundaries past formal submission deadlines. Post-submission optimizations on models like GPT-OSS-120B and DLRMv3 indicate that hardware efficiency will only compound as software stacks mature. With 19 hardware partners—including ASUS, Azure, Cisco, CoreWeave, Dell Technologies, HPE, Oracle Cloud Infrastructure, and Supermicro—embedding these architectures into enterprise pipelines, the yearly cadence of NVIDIA platform deployment is fundamentally reshaping AI infrastructure economics.
