According to Korean media reports, Samsung Electronics has replaced the head of the semiconductor R&D center responsible for developing next-generation chips, and the top management of the foundry business has also been reshuffled, with memory experts leading the core foundry business; the industry believes that Samsung has advanced The process has repeatedly reported that the yield rate is not good. When the mass production of 3nm is about to be preempted, the high-level relocation is carried out in a drastic manner, in order to accelerate the improvement of the yield rate of the advanced process, in order to compete with TSMC (2330-TW)(TSM-US) to compete.
Foreign media pointed out that Samsung Electronics has appointed Song Jae-hyuk, vice president and head of the Flash development department, as the new head of the semiconductor research and development center.
In terms of foundry business, Nam Seok-woo, vice president of global manufacturing and infrastructure of the semiconductor equipment solutions department, is assigned as the head of the foundry manufacturing technology center. Both are experts in Samsung’s memory process technology development. At the same time, Kim Hong-shik, vice president of the memory manufacturing technology center, was appointed to lead the foundry technology innovation team.
At the end of last year, Samsung announced a major relocation of high-level personnel, completely replaced the three major business leaders of semiconductors, mobile phones, and consumer electronics, and merged the mobile phone and consumer electronics businesses, shifting the focus of operations to semiconductors, and then deploying the memory business after half a year. To the foundry business, actively promote the development of the foundry business.
Samsung expects to mass-produce the 3-nanometer process as soon as this (6) months, overtaking TSMC, which is mass-produced in the second half of the year. However, Samsung’s advanced process yield has always been the focus of outside attention. Insufficient number of IPs leads to a yield rate of only 10-20%. Even if the yield rate of the 4nm process reaches 35%, it is still far below TSMC’s 70%.